(China (Mainland))
Product Summary
The EPF10K30AFC256-3 device is the industry’s first embedded PLD. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions. With up to 250,000 gates, the EPF10K30AFC256-3 provides the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device.
Parametrics
EPF10K30AFC256-3 absolute maximum ratings: (1)Typical gates (logic and RAM): 70,000; (2)Maximum system gates: 118,000; (3)LEs: 3,744; (4)LABs: 468; (5)EABs: 9; (6)Total RAM bits: 18,432; (7)Maximum user I/O pins: 358.
Features
EPF10K30AFC256-3 features: (1)The industry’s first embedded programmable logic device (PLD) family, providing System-on-a-Programmable-Chip (SOPC) integration; (2)High density; (3)System-level features; (4)Flexible interconnect; (5)Powerful I/O pins; (6)Peripheral register for fast setup and clock-to-output delay; (7)Flexible package options.
Diagrams
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 EPF10K100ABC356-2 |
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IC FLEX 10KA FPGA 100K 356-BGA |
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EPF10K100ABC356-2N |
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IC FLEX 10KA FPGA 100K 356-BGA |
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EPF10K100ABC356-3 |
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IC FLEX 10KA FPGA 100K 356-BGA |
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EPF10K100ABI600-2 |
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IC FLEX 10KA FPGA 100K 600-BGA |
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EPF10K100ARC240-1 |
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IC FLEX 10KA FPGA 100K 240-RQFP |
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EPF10K100ARC240-1N |
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IC FLEX 10KA FPGA 100K 240-RQFP |
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